# Physical Design Engineer | ASIC Physical Design Engineer (PnR/STA)

**Company:** [Erbity Private Limited](http://jobs.workable.com/companies/ofZNxaSYsQxnso7LN4hhk2.md)
**Location:** Bengaluru, India
**Workplace:** hybrid
**Employment type:** Full-time
**Department:** Physical Design

[Apply for this job](http://jobs.workable.com/view/7cfa01c4-1f30-41c3-9375-534bef547538)

## Description

This role is about owning the silicon journey from floorplan to signoff.

-   5–8 years in physical design and SoC implementation
-   Strong experience in Cadence tools: Innovus, Tempus, Voltus, Quantus
-   Hands-on with floorplanning, PnR, STA, and EM/IR closure
-   Proven ability to meet aggressive PPA targets
-   Experience in clock tree, routing optimization, and extraction
-   Strong understanding of ASIC design flow and signoff
-   Exposure to automation and flow improvements
-   Strong collaboration and execution mindset

If PPA targets excite you more than scare you, this one’s for you.

## Requirements

**Physical Design Engineer | ASIC Physical Design Engineer (PnR/STA)**

## Benefits

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