# ASIC Engineer | ASIC Implementation Engineer (Synthesis/STA/DFT)

**Company:** [Erbity Private Limited](http://jobs.workable.com/companies/ofZNxaSYsQxnso7LN4hhk2.md)
**Location:** Bengaluru, India
**Workplace:** hybrid
**Employment type:** Full-time
**Department:** Design & Architecture

[Apply for this job](http://jobs.workable.com/view/e44c2372-45bf-42bf-a355-761b23a0d07a)

## Description

If you like connecting design intent with silicon reality, this role hits that sweet spot.

-   5–9 years in ASIC design and implementation
-   Strong experience in Synthesis, STA, DFT, Lint, and CDC
-   Hands-on with timing constraints and closure
-   Experience with Tempus and PrimeTime tools
-   Strong understanding of MMMC, SDF, and GLS support
-   Experience in timing model generation and validation
-   Ability to collaborate with design and SoC teams
-   Strong analytical and debugging skills

If you enjoy solving timing puzzles others avoid, you’ll thrive here.

## Requirements

• Working knowledge of Synthesis, DFT, STA, Lint & CDC

• Work closely with design teams to understand the requirements and constraints of the design.

• Write and implement block level and top-level constraints for synthesis and STA.

• Experience of performing STA preferably with both Tempus and Primetime

• STA and Timing closure using MMMC in both functional and DFT modes

• Experience on SDF generation and validation and support to functional verification team during GLS.

• ETM /timing model generation and validation at IP level.

• Working in partnership with SoC teams to support the IP at SoC level.